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Embedded Systems - Model-Based Design

Lessons - Handouts

Lesson	Description	Slides	Video	Add. Material
0 Introduction	Course layout and contents, prerequisites, the development process
1 Requirements Analysis	Requirements in the development process, how to write requirements, tracing requirements to test and design
2 SysML	The SysML modeling language, metamodel, diagrams, blocks and BBDs. Introduction to Papyrus		1:17:21 Intro to SysML and Papyrus, models and metamodel, structure diagrams 26:20 Structure diagrams, blocks, BDDs and IBDs 1:16:15 Model examples, ports, intro to profiles 55:35 Profiles and stereotypes for platform and SW architecture 26:24 Profiles, stereotypes and Mapping 52:16 SysML diagrams for behavior modeling	Book reference, links, papyrus models
3 Functional testing	introduction to functional (black-box) testing		39:44 Functional testing
4 Introduction to Simulink	introduction to Simulink models, synchronous reactive semantics and simulation		36:58 Introduction to Simulink 1:35:20 Simulink execution semantics: simulation and code generation 31:40 Simulink intro: code generation, task implementation and Rate Transition blocks	Models, examples, Mathworks web site resources
5 Signals and systems	Fundamentals of models as abstractions of real-world signals and systems		42:54 Signals and Systems	Lee and Varaija's book
6 State Machines	Introduction to flat finite state machines and automata, notation Composition of State Machines, connections Hierarchical state machines Behavior, Equivalence, Refinement and Simulation	Introduction Composition Hierarchical FSM Behavior Macho Library	58:55 General concepts 58:23 Composition of state machines 39:41 Hierarchical state machines: UML State diagrams, Statecharts, Stateflow 38:46 Behavior, Equivalence and Abstraction	Lee and Varaija's book OMG Specification of State diagrams Mathworks Stateflow User Manual
7 Implementation of State Machines	Patterns for the implementation of state machines using C and C++		1:06:55 Double switch statement, state table 1:18:02 State Pattern, Samek's pattern	Miro Samek's book
Laboratory: Simulink and Stateflow	Modeling and code generation with Simulink and Stateflow	See the laboratory page	27:11 Part 1 54:14 Part 2 53:50 S Function in m language 1:13:15 S Function in C and TLC language
8 Code generation from SysML	Code Generation from UML and sysML models in Eclipse/Papyrus (and any Ecore) using Acceleo		1:26:59 Acceleo model-to-text	Acceleo web site Acceleo 2.6 Manuals Acceleo 3.0 Docs Acceleo script examples
9 Conformance testing	Methods and algorithms for the generation of conformance tests with state and transition coverage		1:10:28 model-based testing
10 Unit testing and code coverage	Fundamentals (and examples of Unit testing (using CTest) and cove coverage measurements (using gcov)	Unit test with CTest Coverage with gcov	1:04:55 Unit test with CUnit and structure test with gcov	CTest web site gcov web site
11 The CAN bus	The controller area Network, standard, architecture and time analysis	Controller Area Network	30:06 Intro 57:31 The standard-timing analysis 42:55 Architecture and Issues

Other lectures (not 2013)

Lesson 10: Synchronous networks: an Introduction to FlexRay

Lesson 11: Timed Automata

Lesson 12: An introduction to formal verification using Uppaal

Lesson 18: Semantics preservation and architecture optimization