TUTORIAL

Title
MARTE: A New Standard for Modeling and Analysis of Real-Time and Embedded Systems

Date

    July 3, 2007

Location

    RETIS Lab, Scuola Superiore Sant'Anna, CNR Area, Via Moruzzi 1, 56124 Pisa, Italy (see Maps).

Organizer

Speakers

  • Dr. Sébastien Gérard, CEA-LIST, France
  • Dr. Julio Medina, CEA-LIST, France
  • Pr. Dorina Petriu, Carleton University, Canada

Abstract

Since the adoption of the UML standard and its new advanced release UML2, this modeling language has been used for the development of a large number of time-critical and resource-critical systems. Based on this experience, a consensus has emerged that, while a useful tool, UML is lacking modeling elements that would be useful in key areas that are of particular concern to real-time and embedded system designers and developers. In particular, it was noticed that, first, the lack of quantifiable notions of time and resources was an impediment to its broader use in the real-time and embedded (RT/E) domain. Second, the need for a rigorous semantics definition is also a mandatory requirement for a widespread usage of the UML for RT/E systems development. And third, specific constructs were required to build models using artifacts related to the real-time operating system level such as task and semaphore.

Fortunately, and contrary to an often expressed opinion, UML has all the requisite mechanisms for addressing these issues, in particular through its extensibility facilities. Consequently, defining a suitable UML profile for RT/E consists in defining a standard way of using these capabilities to represent concepts and practices from the real-time and embedded domain. Such a first attempt is referred to be the UML Profile for Schedulability, Performance and Time. The scope of this extension was mainly model-based RT analysis, especially rate-monotonic analysis for schedulability analysis and layered queuing analysis for performance analysis.

The new standard provided by the Object Management Group, called the MARTE profile, addresses a broader scope than its predecessor (the SPT one). MARTE wants to tackle with all the activities of the two classical branches of the V cycle, i.e. modeling and validation& verification. Modeling capabilities have to ensure both hardware and software aspects of RTES in order to improve communication/exchange between developers. It has also to foster the construction of models that may be used to make quantitative analysis regarding hardware and software characteristics.

The purpose of this tutorial is then to introduce the participants to the issues of model-driven development of RT/E applications and present how to use the new OMG standard for dealing with model-driven development of RT/E applications.


Program:

The following program schedule relies on the following assumptions: 2 sessions of 3 hours including 2 30 minutes breaks and a lunch break of 1 and half hour:

  • 09:00 am to 10:15 am: Introduction to model-driven development for RT/E systems and MARTE general constructs
  • 10:15 am to 10:45 am: Break
  • 10:45 am to 12:00 am: High-level modeling and detailed design
  • 13:00 pm to 14:30 pm: Lunch
  • 14:30 pm to 15:00 pm: Introduction to model-based RTE analysis
  • 15:00 pm to 15:45 pm: Model-based schedulability analysis
  • 15:45 pm to 16:15 pm: Break
  • 16:15 pm to 17:00 pm: Model-based performance analysis
  • 17:00 pm to 17:30 pm: Conclusions and perspectives about MARTE

Intended audience:

The targeted audience of this tutorial is for practitioners of RT/E domains who want to learn about how to use UML and its standard extension for RT/E in order to specify, design and analyze models of their applications. The intent of this tutorial is not to give a tutorial on UML itself, but rather to present the MARTE standard. Participants are not required to have a deep understanding or practice of UML, but they should at least know about object oriented paradigm and statemachines.


Speakers:

Dr. Sébastien Gérard has a doctorate in computer science. He graduated also in 1995 from ENSMA (French Superior School of Mechanics and Aeronautics at Poitiers) as a mechanical and aeronautics engineer. He worked for one year at LISI (Laboratory of Scientific and Industrial Computer Science of Poitiers), where he had interest in defining a methodology for the measurement of the worst case execution time of real-time application. Today he is researcher at LIST (CEA - French Atomic Energy Agency) in the LSP Group (Software for Process Safety) where he leads the research theme: “Model-based software engineering for RT systems”. He is also strongly involved in OMG standardizations working on UML2 and chairing the MARTE standardization (www.promarte.org). Finally, he is the main initiator of the series of workshop dedicated to the development of distributed, real-time and embedded systems using the model-driven paradigm. And he is co-organizer of the international summer school on MDD for DRES located in France in September 2006 (http://www.mdad4dres.info).

Julio Medina is graduated as Electronics Engineer from the Universidad Nacional de Ingenieria, Perú, in 1987. He obtained the Master in Real-Time Systems and the Doctorate in Telecommunications Engineering from the University of Cantabria, Spain, in 1993 and 2005 respectively. He developed electronics and embedded software for nuclear instrumentation in the Peruvian Nuclear Research Centre, he then worked as assistant professor in electronics instrumentation and software engineering, and did research on distributed real-time systems. During the doctorate period he concentrated on the modeling of real-time systems developed with object-oriented techniques. He is currently a post-doc in the Commisariat à l'Energie Atomique in France. His main research topics include the modeling of real-time distributed systems for schedulability analysis, the UML representation of such models, and its usage for component-based development strategies.

Pr. Dorina C. Petriu is a full Professor in the Department of Systems and Computer Engineering at Carleton University, Ottawa, Canada. She received a Dipl. Eng. degree in computer engineering from the Polytechnic University of Timisoara, Romania, and a Ph.D. degree in electrical engineering from Carleton University, Ottawa. Her research interests are in the areas of performance modeling and software engineering, with emphasis on integrating performance engineering into the software development process. She was a contributor to the UML Profile for Schedulability, Performance and Time, standardized by OMG, and is a member of the working group that is defining the UML Profile for Modeling and Analysis of Real-Time and Embedded Systems (MARTE).