Publications

  • Francesco Restuccia, Alessandro Biondi, Mauro Marinoni, Giorgiomaria Cicero, and Giorgio Buttazzo, "AXI HyperConnect: A Predictable, Hypervisor-level AXI Interconnect for Hardware Accelerators in FPGA SoC", In proceedings of the 57th ACM/IEEE Design Automation Conference (DAC 2020), San Francisco, California, USA, July 19-23, 2020.

  • Francesco Restuccia, Marco Pagani, Alessandro Biondi, Mauro Marinoni, and Giorgio Buttazzo, "Modeling and Analysis of Bus Contention for Hardware Accelerators in FPGA SoCs", In Proceedings of the 32nd Euromicro Conference on Real-Time Systems (ECRTS 2020), July 7-10, 2020.

  • Francesco Restuccia, Alessandro Biondi, Mauro Marinoni, and Giorgio Buttazzo, "Safely Preventing Unbounded Delays During Bus Transactions in FPGA-based SoC", In proceedings of the 28th IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM 2020), Fayetteville, Arkansas, USA, May 3-6, 2020.

  • Francesco Restuccia, Marco Pagani, Alessandro Biondi, Mauro Marinoni, and Giorgio Buttazzo, "Is Your Bus Arbiter Really Fair? Restoring Fairness in AXI Interconnects for FPGA SoCs", ACM Transactions on Embedded Computing Systems (TECS), 2019, 18.5s: 51. Presented at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES 2019), New York, USA, October 13 - 18, 2019.
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  • Alessandro Grossi, Lorenzo Zuolo, Francesco Restuccia, Cristian Zambelli, and Piero Olivo, "Quality-of-service implications of enhanced program algorithms for charge-trapping NAND in future solid-state drives", In IEEE Transactions on Device and Materials Reliability, 15(3), 363-369. 2015.
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