Welcome! I'm a PhD Fellow at Scuola Superiore Sant'Anna - Pisa (Italy). In September 2013 I achieved the Bachelor's Degree in Computer Science Engineering at the University of Pisa with the score of 110/110. In July 2016 I graduated cum laude in the Master of Science in Embedded Computing Systems, jointly offered by University of Pisa and Scuola Superiore Sant'Anna. In October 2016 I joined the ReTiS Lab, working under the supervision of Prof. Giorgio Buttazzo and Prof. Alessandro Biondi. Currently (October 2018 - March 2019), I'm visiting the Max Planck Institute for Software Systems - Kaiserslautern (Germany), to work with Björn Brandenburg.

News

• 14-Feb-2019: The paper "Analyzing Parallel Real-Time Tasks Implemented with Thread Pools" (Authors: Daniel Casini, Alessandro Biondi, and Giorgio Buttazzo) has been accepted for pubblication at DAC 2019 .
• 01-Feb-2019: I'll teach the module on "Frameworks for developing DNNs" in the course of Neural Networks - Scuola Superiore Sant'Anna .
• 15-Nov-2018: The paper "Handling Transients of Dynamic Real-Time Workload Under EDF Scheduling" (Authors: Daniel Casini, Alessandro Biondi, and Giorgio Buttazzo) has been accepted for pubblication in IEEE Transactions on Computers.

Upcoming events

• 39th IEEE Real-Time Systems Symposium, Nashville, Usa, December 11-14, 2018. I authored two papers at the main conference:
  1. Daniel Casini, Alessandro Biondi, Geoffrey Nelissen, and Giorgio Buttazzo, "Partitioned Fixed-Priority Scheduling of Parallel Tasks Without Preemptions".
     
  2. Daniel Casini, Alessandro Biondi, Geoffrey Nelissen, and Giorgio Buttazzo, "Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures".
     

Service

• Secondary Reviewer for: DAC 2019, Eurosys 2019, RTAS 2019, RTSS 2018, RTSOPS 2018, EMSOFT 2018, RTAS 2017
• Member of the Technical Program Committee of: RTAS 2019 (Brief Presentations), RTAS 2019 (Artifact Evaluation), JRWRTC 2018
• Reviewer for international journals: Springer Real-Time Systems Journal, ACM Transactions on Embedded Computing Systems (TECS)