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Welcome!
I'm a PhD Fellow at Scuola Superiore Sant'Anna - Pisa (Italy).
In September 2013 I achieved the Bachelor's Degree in Computer Science Engineering at the University of Pisa with the score of 110/110.
In July 2016 I graduated cum laude in the Master of Science in Embedded Computing Systems, jointly offered by University of Pisa and Scuola Superiore Sant'Anna.
In October 2016 I joined the ReTiS Lab, working with the group of Prof. Giorgio Buttazzo.
Research Interests
My research is focused on Real-Time Embedded Systems.
In particular I'm working on:
- Real-time operating systems
- Real-time schedulability analysis
- Synchronization protocols
- Component-based Software Design
Contacts
Daniel Casini,Via G. Moruzzi 1, 56124 Pisa (PI), Italy
Scuola Superiore Sant'Anna (TeCiP Institute, ReTiS Laboratory)
Tel. +39 050 549 2043
daniel.casini@sssup.it
Upcoming events
- 12th Junior Researcher Workshop on Real-Time Computing (JRWRTC 2018), October 10-12, 2018, Poitiers, France
