Welcome! I'm a PhD Fellow at Scuola Superiore Sant'Anna - Pisa (Italy). In September 2013 I achieved the Bachelor's Degree in Computer Science Engineering at the University of Pisa with the score of 110/110. In July 2016 I graduated cum laude in the Master of Science in Embedded Computing Systems, jointly offered by University of Pisa and Scuola Superiore Sant'Anna. In October 2016 I joined the ReTiS Lab, working under the supervision of Prof. Giorgio Buttazzo and Prof. Alessandro Biondi. Currently, I'm visiting the Max Planck Institute for Software Systems - Kaiserslautern (Germany) for a period of six months, to work with Björn Brandenburg.

News

• 15-Nov-2018: The paper "Handling Transients of Dynamic Real-Time Workload Under EDF Scheduling" (Authors: Daniel Casini, Alessandro Biondi, and Giorgio Buttazzo) has been accepted for pubblication in IEEE Transactions on Computers.

Upcoming events

• 39th IEEE Real-Time Systems Symposium, Nashville, Usa, December 11-14, 2018. I authored two papers at the main conference:
  1. Daniel Casini, Alessandro Biondi, Geoffrey Nelissen, and Giorgio Buttazzo, "Partitioned Fixed-Priority Scheduling of Parallel Tasks Without Preemptions".
     
  2. Daniel Casini, Alessandro Biondi, Geoffrey Nelissen, and Giorgio Buttazzo, "Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures".
     

Service

• Secondary Reviewer for: RTAS 2017, EMSOFT 2018, RTSOPS 2018, RTSS 2018
• Member of the Technical Program Committee of: JRWRTC 2018