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I'm a PhD Fellow at Scuola Superiore Sant'Anna - Pisa (Italy).

In September 2013 I achieved the Bachelor's Degree in Computer Science Engineering at the University of Pisa with the score of 110/110.

In July 2016 I graduated cum laude in the Master of Science in Embedded Computing Systems, jointly offered by University of Pisa and Scuola Superiore Sant'Anna.

In October 2016 I joined the ReTiS Lab, working under the supervision of Prof. Giorgio Buttazzo and Prof. Alessandro Biondi.

Currently (October 2018 - March 2019), I'm visiting the Max Planck Institute for Software Systems - Kaiserslautern (Germany), to work with
Björn Brandenburg.


  • 15-Nov-2018: The paper "Handling Transients of Dynamic Real-Time Workload Under EDF Scheduling" (Authors: Daniel Casini, Alessandro Biondi, and Giorgio Buttazzo) has been accepted for pubblication in IEEE Transactions on Computers.

Upcoming events

  • 39th IEEE Real-Time Systems Symposium, Nashville, Usa, December 11-14, 2018. I authored two papers at the main conference:
    1. Daniel Casini, Alessandro Biondi, Geoffrey Nelissen, and Giorgio Buttazzo, "Partitioned Fixed-Priority Scheduling of Parallel Tasks Without Preemptions".
    2. Daniel Casini, Alessandro Biondi, Geoffrey Nelissen, and Giorgio Buttazzo, "Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures".


Research Interests

My research is focused on Real-Time Embedded Systems.
In particular I'm working on:

  • Real-time operating systems
  • Real-time schedulability analysis
  • Synchronization protocols
  • Component-based Software Design
  • Predictability in AI-based Applications


Daniel Casini,
Via G. Moruzzi 1, 56124 Pisa (PI), Italy
Scuola Superiore Sant'Anna (TeCiP Institute, ReTiS Laboratory)
Tel. +39 050 549 2043